Design Name | registerbeispiel_01 |
Fitting Status | Successful |
Software Version | J.33 |
Device Used | XC95108-7-PC84 |
Date | 1-18-2011, 4:30PM |
Macrocells Used | Pterms Used | Registers Used | Pins Used | Function Block Inputs Used |
---|---|---|---|---|
4/108 (4%) | 16/540 (3%) | 4/108 (4%) | 13/69 (19%) | 24/216 (12%) |
|
|
Signal mapped onto global clock net (GCK1) | CLK |
Macrocells in high performance mode (MCHP) | 4 |
Macrocells in low power mode (MCLP) | 0 |
Total macrocells used (MC) | 4 |